As a PWM control method, in general, triangular wave comparison PWM is used. In order to reduce harmonics in output voltage, the frequency of the PWM carrier needs to be increased. However, in a large-capacity inverter, since the switching speed of a GTO used as a switching device is slow, the frequency of the PWM carrier cannot be increased. As a result, there is a problem that low-order harmonics are left in the output voltage.
Considering this, a low-order harmonic eliminating PWM control method is proposed which performs switching at a timing of reducing a specific low-order harmonic by effectively utilizing a small number of times of switching (see, for example, Patent Document 1 and Non-Patent Document 1).
A low-order harmonic eliminating PWM switching method using a so-called multilevel inverter is described in, for example, Patent Document 2. Patent Document 2 discloses a designing method for low-order harmonic eliminating PWM control, in which, using a 5-level inverter having a two-stage (two-leg) series configuration in which each stage corresponds to 3-level switching, occurrence of double switching voltage is prevented in line-to-line voltage and switching is performed at a timing of reducing harmonics.